1. Field of the Invention
The present invention relates to a test structure of a semiconductor device, and more particularly, to a test structure of a semiconductor device capable of conducting a highly reliable test.
2. Description of the Related Art
As semiconductor devices continue to be highly integrated, the sheet resistance and contact resistance of the gate electrodes and source/drain regions of the MOS transistors increase, thereby increasing the resistance-capacitance delay time of the electrical signal that is applied to the gate electrodes of metal oxide semiconductor (MOS) transistors.
Accordingly, to produce high-performance MOS transistors suitable for highly integrated semiconductor devices, a silicide layer is formed on a gate electrode and a source/drain region of a MOS transistor. The silicide layer is usually formed by a self-aligned silicide (salicide) process.
After a metal layer for forming silicide is coated on the entire surface of a semiconductor substrate on which a gate electrode and a source/drain region of an MOS transistor are formed, a silicide layer is formed by performing a thermal treatment, such as a rapid thermal process (RTP). However, the silicide layer that is formed on the source/drain region may encroach into the lower parts of spacers formed at both side walls of the gate electrode. This is referred to as a lateral encroachment phenomenon. In a case where the lateral encroachment phenomenon is generated, the drain-off current Idoff of the MOS transistor is drastically increased just as the source/drain regions become short. The lateral encroachment phenomenon is undesirable because it degrades the electrical characteristics and reliability of the MOS transistors.
Accordingly, it would be desirable to have a test structure of a semiconductor device that is capable of determining whether lateral encroachment of silicide has occurred after performing a silicide formation process.